1. Field of the Invention
The invention generally relates to integrated circuit packaging and, more particularly, to a molded integrated circuit package.
2. Background of the Related Art
Microelectronic devices typically include one or more die (i.e., micro integrated circuits formed on a single substrate) having a multitude of die bond pads, a chip body, and an interconnection scheme to connect the pads on the die to a supporting substrate. Generally, the supporting substrate is formed into a package around the die to provide physical protection from contaminates as well as structural support for the die. The combination of these items is generally referred to as a “chip package”. According to conventional packaging methodologies, the number of interconnects for common integrated circuit (IC) packages such as a dual-inline package (DIP), single-inline package (SIP), and others, is limited to the perimeter of the package. Generally, a ball grid array (BGA) package style is used to facilitate an increased connection density. The BGA package provides interconnections from the package bottom or top surface, thus increasing the number of potential interconnection points.
Generally, as ICs increase in speed and performance they also increase in device operating frequency. Unfortunately, the increase in device frequency increases the device sensitivity to parasitic capacitance and inductance, particularly when the IC operates in the gigahertz range. The device packaging, die, and internal die interconnections, all provide potential sources that may negatively impact device performance. For example, to decrease the height and cost of packaging, device packages are often molded simultaneously to a plurality of individual IC circuits on one substrate. The packaging material generally envelopes the circuit such that the material contacts the circuitry. Subsequently, the individual circuits are then cut away from the single substrate using, for example, a high-speed saw to form individual ICs. Unfortunately, as device frequencies increase the type of packaging material used to protect the circuits from external damage and contamination decreases the overall IC performance. In particular, the relatively high dielectric constant of a plastic package reduces the high frequency performance of the IC. This is especially problematic for radio frequency (RF) components such as amplifiers, mixers, and the like.
To accommodate the higher IC performance and the performance of RF circuits, IC manufacturers often use individual ceramic covers having a lower dielectric constant than a plastic package. Unfortunately, to add individual covers is expensive relative to the molded plastic packaging and therefore is often avoided, thereby sacrificing IC performance.
Therefore, what is a needed is a method and apparatus to provide an efficient and a cost effective package for high speed and RF integrated circuits.